From cb90e4f40af4764fcdf18077baffb61adac6eeb2 Mon Sep 17 00:00:00 2001 From: Boris Honman Date: Wed, 21 Aug 2019 21:40:47 -0400 Subject: [PATCH] added bootloader force entry by input pin, projects changed back to build for the PIC18F2550 --- .../nbproject/configurations.xml | 2 +- bootloader/src/main.c | 38 +++++++-- common_src/system.c | 82 ++----------------- .../nbproject/configurations.xml | 6 +- 4 files changed, 40 insertions(+), 88 deletions(-) diff --git a/bootloader/clubdance_v2_bootloader.X/nbproject/configurations.xml b/bootloader/clubdance_v2_bootloader.X/nbproject/configurations.xml index 007b3cf..c4d0098 100644 --- a/bootloader/clubdance_v2_bootloader.X/nbproject/configurations.xml +++ b/bootloader/clubdance_v2_bootloader.X/nbproject/configurations.xml @@ -49,7 +49,7 @@ localhost - PIC18F4550 + PIC18F2550 PICkit3PlatformTool diff --git a/bootloader/src/main.c b/bootloader/src/main.c index 5426e81..ab5d919 100644 --- a/bootloader/src/main.c +++ b/bootloader/src/main.c @@ -5,10 +5,19 @@ * Created on August 9, 2019, 6:14 PM */ +#include + #include "usb.h" #include "bootloader.h" -unsigned int uint_delay_counter; +/** + * Comment this out to not check the bootloader entry override switch. + * THIS IS NOT RECOMMENDED!! + * If disabled the ONLY way to enter firmware update mode is by a jump from the application code. + * IF YOU FLASH BROKEN APPLICATION FIRMWARE YOU WILL HAVE A BRICK!! + * At that point the device can only be reprogrammed by a dedicated programmer such as the ICD or Pickit 3. + */ +#define ENABLE_HARDWARE_MODE_OVERRIDE /* Private prototypes */ void main(void); @@ -19,11 +28,26 @@ const unsigned int FlashSignatureWord __at(APP_SIGNATURE_ADDRESS) = APP_SIGNATUR void main(void) { - /** - * TODO: implement hardware IO-based method for forcing entry into bootloader - */ - goto DoFlashSignatureCheck; - +#ifdef ENABLE_HARDWARE_MODE_OVERRIDE + // immediately enter bootloader's firmware update mode if override switch is pressed + PORTA = 0x00; // initialize PORTA by clearing output data latches + ADCON1 = 0x0F; // disable analog functionality on PORTA pins + CMCON = 0x07; // disable comparators on PORTA pins + TRISAbits.RA0 = 1; // configure pin RA0 as input + if (PORTAbits.RA0 == 1) + { + // switch is NOT pressed. bootloader will execute as normal + ADCON1 = 0x00; // restore ADCON1 register to default state + TRISAbits.RA0 = 0; // restore RA0 pin direction to default state (output) + // start the signature check + goto DoFlashSignatureCheck; + } + else + { + // switch IS pressed. bypass signature check and immediately enter firmware update mode + BootMain(); + } +#endif // normal operation: verify the firmware signature is valid. if it isn't enter // bootloader (fw update) mode so valid firmware can be flashed DoFlashSignatureCheck: @@ -50,7 +74,7 @@ DoFlashSignatureCheck: BootMain(); } -void BootMain(void) __at(0x30) +void BootMain(void) __at(BOOTLOADER_ENTRYPOINT) { //Make sure interrupts are disabled for this code (could still be on, //if the application firmware jumped into the bootloader via software methods) diff --git a/common_src/system.c b/common_src/system.c index e511ace..0f60107 100644 --- a/common_src/system.c +++ b/common_src/system.c @@ -24,76 +24,6 @@ */ //#include "usb.h" -#ifdef PIC18F2550 - -// PIC18F2550 Configuration Bit Settings - -// 'C' source line config statements - -// CONFIG1L -#pragma config PLLDIV = 3 // PLL Prescaler Selection bits (Divide by 3 (12 MHz oscillator input)) -#pragma config CPUDIV = OSC3_PLL4// System Clock Postscaler Selection bits ([Primary Oscillator Src: /3][96 MHz PLL Src: /4]) -#pragma config USBDIV = 2 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2) - -// CONFIG1H -#pragma config FOSC = HSPLL_HS // Oscillator Selection bits (HS oscillator, PLL enabled (HSPLL)) -#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) -#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) - -// CONFIG2L -#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled) -#pragma config BOR = ON // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled)) -#pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting 2.05V) -#pragma config VREGEN = ON // USB Voltage Regulator Enable bit (USB voltage regulator enabled) - -// CONFIG2H -#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT enabled) -#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768) - -// CONFIG3H -#pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1) -#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset) -#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation) -#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled) - -// CONFIG4L -#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset) -#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled) -#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) - -// CONFIG5L -#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected) -#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected) -#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected) -#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected) - -// CONFIG5H -#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected) -#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected) - -// CONFIG6L -#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected) -#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected) -#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected) -#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected) - -// CONFIG6H -#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected) -#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected) -#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected) - -// CONFIG7L -#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks) -#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks) -#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks) -#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks) - -// CONFIG7H -#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks) - -// #pragma config statements should precede project file includes. -// Use project enums instead of #define for ON and OFF. -#else // PIC18F4550 Configuration Bit Settings @@ -101,11 +31,11 @@ // CONFIG1L #pragma config PLLDIV = 3 // PLL Prescaler Selection bits (Divide by 3 (12 MHz oscillator input)) -#pragma config CPUDIV = OSC3_PLL4// System Clock Postscaler Selection bits ([Primary Oscillator Src: /3][96 MHz PLL Src: /4]) +#pragma config CPUDIV = OSC4_PLL6// System Clock Postscaler Selection bits ([Primary Oscillator Src: /4][96 MHz PLL Src: /6]) #pragma config USBDIV = 2 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2) // CONFIG1H -#pragma config FOSC = HSPLL_HS // Oscillator Selection bits (HS oscillator, PLL enabled (HSPLL)) +#pragma config FOSC = HS // Oscillator Selection bits (HS oscillator (HS)) #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) #pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) @@ -128,7 +58,9 @@ // CONFIG4L #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset) #pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled) +#ifdef PIC18F4550 #pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled) +#endif #pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) // CONFIG5L @@ -164,8 +96,4 @@ // #pragma config statements should precede project file includes. // Use project enums instead of #define for ON and OFF. -#include - - - -#endif \ No newline at end of file +#include \ No newline at end of file diff --git a/firmware/clubdance_v2.X/nbproject/configurations.xml b/firmware/clubdance_v2.X/nbproject/configurations.xml index 1fc0fdc..e715a3b 100644 --- a/firmware/clubdance_v2.X/nbproject/configurations.xml +++ b/firmware/clubdance_v2.X/nbproject/configurations.xml @@ -59,7 +59,7 @@ localhost - PIC18F4550 + PIC18F2550 PICkit3PlatformTool @@ -141,7 +141,7 @@ - + @@ -275,7 +275,7 @@ localhost - PIC18F4550 + PIC18F2550 PICkit3PlatformTool